In a data processing system, shared buses are used to interconnect plural resources together. For example, a data bus could be shared by various local area networks (LANs). The LANs transfer data between each other over the shared data bus.
Because of the potential of congestion that could arise with many resources using a single bus, some mechanism must be provided to control the trafficking of data over the bus. A controller shapes the traffic on a bus by passing traffic generated by resources onto the bus, by delaying traffic or by blocking traffic from the bus. Prior art controllers utilize gating mechanisms that simply pass and/or block arrivals to and from the bus.
In addition to controllers, the prior art utilizes arbiters to control the trafficking of data over the bus. Arbiters typically utilize priority schemes to determine which particular resource gains access to the bus.
Prior art arbiters operate from the bus. When a resource needs to transmit data on the bus, it transmits its request on the bus to the arbiter. The arbiter enqueues the request and determines which resource can transmit on the bus. Because the bus is used to transmit not only data, but also requests, and because some bus cycles are used to transmit information between the arbiter and the resources, the data carrying capacity of the bus is reduced.
Furthermore, prior art arbiters consider only the source (that is the transmitting resource) of a given bus access request. The arbiters do not consider the status of a receiving resource. Therefore, a particular receiving resource that has not had data sent to it for some period of time may run out of data to process. This situation does not allow for the efficient use of the resources.